RTL/FPGA
Programmed for Future
Simask Technologies’ Logic design group enables customers design and implement their next-generation SoCs efficiently from Spec through Architecture to RTL implementation.
The Logic design group builds on Simask’s focus on sense, security, networking and compute technologies to help customers solve some of the most challenging problems facing end users in a variety of application domains.
Having recently been certified as an Arm ADP (Approved Design Partner), BlackPepper Technologies enables customers bring unique products to the market by helping integrate customer intellectual property with other IPs and components necessary to build a silicon solution.
Add to this our expertise in FPGA design and prototyping and we have a highly competitive team that helps customers achieve product goals in an ever-more challenging market.
The Logic design group’s IoT platform symbolises the company’s commitment to help customers achieve fast TTM through a highly configurable SoC infrastructure framework. The platform provides customers with diverse choices in system architecture, connectivity, security and sensor integration, thereby enabling customers to focus on their differentiating IPs and freeing-up their precious resources from the burden of system-level productization activities.
Capability snapshot for ASIC/SoC
ASIC/SoC Capability
| Domains | Networking (Wired/Wireless), Automotive, Consumer Electronics, Computing, Avionics |
| Processor Architecture | ARM, x86 |
| Device Utilization | 96% logic, 100% IO |
| Level of Design Experience | SoC Level as well as IP Level |
| Technology Nodes | DSM |
| Bus Protocols | Popular industry-standard protocols including AMBA (AXI/AHB/APB) |
Capability snapshot for FGPA
FPGA Capability
| Vendor Experience | Xilinx, Altera, Actel (Microsemi), Lattice |
| FPGA Families used | Xilinx : Spartan, Virtex, Artix, Kintex, |
| Altera : Stratix, Cyclone, | |
| Actel : IGLOO, SMARTFUSION, | |
| Lattice : iCE | |
| Device Utilization | 96% logic, 100% IO |
| Max. Operating Frequency | 200Mhz (FPGA core array) |
| Transceiver usage | 8Gbps, 12.5Gbps |
| Embedded Core Usage | PowerPC, ARM, MicroBlaze, NIOS |
| Max. FPGAs in system | 6 (for SoC prototyping) |
◈ RTL integration for 4-core CA73-based SoC for Consumer Electronics application
◈ Architecture of dual-cluster octacore A73+A53-based SDM 660/630/430/425 Snapdragon SoCs
◈ FPGA-based validation of M33-based multi-core SoC for automotive applications
◈ Design and development of R4-based MCU targeted to Automotive applications
◈ Architecture and implementation of ARM11-based Software-Defined Radio targeted to TSMC 65nm technology
◈ SoC targeting short-distance Giga-bit range data transfer applications using next-generation WiFi protocol. Included Multi-core CPU, High-speed off-chip data transfer through PCIe, AMBA Interconnect and DDR memory interface.
◈ Micro-architecture, RTL coding and Synthesis of several IPs for ARM-based SoC Debug Infrastructure.
◈ Application FPGA design for high speed RF data converter performance evaluation.
◈ Architecture-to-implementation of dual-core Metro Ethernet switches.
◈ Design and development of custom-built Image coprocessors for mobile applications.
◈ Integration of multi-processor SoC targeted to next-gen WiFi standard.
◈ Development of Ethernet Framer sub-system and CDR sub-sytem for Avionics application.