POST SILICON VALIDATION
Your last chance to dash the Silicon Bugs, Safe in our hands
Shorter Time To Market is one of the most critical success factors of any Semiconductor company. So the real challenge is to reduce the Chip Development TAT by squeezing and/or parallelising various stages associated with the entire Chip Development Cycle and PSV plays a key role here. Even with very advanced Pre-silicon verification tools, Post Silicon Validation (PSV) is one of the most crucial steps in ensuring the functional correctness of the chip design. For the complex designs of today, traditional methods for PSV will be very time consuming but these measures are unavoidable. Applying software validation techniques in PSV is the key to solving the puzzle. This can provide significant reduction in validation schedule while also improving and monitoring the coverage requirement.
We consider this as an art more than just a technology skill. At Simask we combine our expertise in the whole gamut of silicon realization to provide our customers with a whole spectrum of silicon validation services. We always aim to reduce the schedule and cost for silicon validation while ensuring required functional coverage is achieved.
Following are our Key Services
Functional validation
• Core blocks – CPU, GPU, VPU, DMAC etc.
• IO interfaces – USB, HDMI, SPI, I2C, CAN, Ethernet etc.
• Subsystem-level functional validation exercising multiple core & IO interfaces
Power and Performance validation
• Custom test cases & standard benchmarks
• Electrical validation across PVT conditions and wafer lots
• Power characterization of blocks, interfaces & voltage domains
• Power validation of subsystems under varying work loads
• Power validation of silicon under varying low-power states
Board Bring up & Automation
• Test case automation and regression
• Bare metal driver development for IO and core blocks & Board Bring-up
• OS-integrated functional, performance and power validation
• Data acquisition, analytics and reporting
Our Experience Snapshot
Tool Expertise
• Measurement tools – CRO, LA, Spectrum Analyzer, Protocol Analyzer
• Automation tools / environments – Labview, PYTHON, PERL
• Emulators – Cadence Palladium, Mentor Veloce
• Debuggers – ARM DS5, Lauterbach
• IDEs – Keil, GNU, CCS
• RTL Simulators – Mentor Questa, Cadence NCSim, Synopsys VCS
Pre-Silicon Environments
• Emulators (eg. Veloce, Palladium)
• Off-the-shelf FPGA-based prototyping boards (eg. HAPS, Dini)
• Custom-built FPGA-based prototyping boards
Post-Silicon Environments
• Silicon evaluation boards – (with extra connectors, debugger-ports, test points, current measurement circuits)
• Form-Factor ready Silicon evaluation boards
◈ Post-Silicon System Level Testing Framework development for a Tier-1 Semiconductor company
◈ JTAG-Less Validation Framework for Post Silicon System Level Testing for a Tier-1 Semiconductor company
◈ Post Silicon Peripherals Validation Diagnostics Development, CPU, DSP and Debug IP Subsystem Validation of IoT and Mobile SoC for a Tier-1 Semiconductor company
◈ Graphics and Display Power Validation, Graphics validation, Media power characterization and optimization, Media decode, processing, encode pipeline Validation for a Tier-1 Semiconductor company
◈ Functional Validation, Power Measurements and PVT for ARM Cortex A5/A7 based SoC
- SurePSV™ JTAG-Less Validation Framework
- SurePSV™ IP-Centric PSV